Process for fabricating electronic circuits based on thin-film transistors and capacitors

ABSTRACT

Process of fabricating an active matrix display screen in which there are left after the second photo-etching segments (S) forming conductive bridges (120, 110, 112, 114) over breaks (103) in the conductive layer (102) forming the columns.

Document FR-A-2 533 072 describes a process for fabricating an activematrix display screen in which there is produced a lower wall carryingcapacitor plates and thin-film transistors and an upper wall coated witha counter-electrode forming the second plates of the capacitors. Theprocess which is the subject matter of this document is characterised inthat, to produce the lower wall, the following operations are carriedout:

depositing a layer of a first transparent conductive material on aninsulative substrate,

photo-etching this first layer to constitute lines and columns of padsforming one of the plates of the eventual capacitors, each pad beingjoined to an appendix, this first photo-etching leaving also columns ofsaid first conductive material disposed between the columns of pads,

depositing a layer of hydrogenated amorphous silicon over everything,

depositing an insulative layer,

depositing a layer of a second conductive material,

photo-etching the silicon layer/insulative layer/conductive layerassembly to leave lines of the second conductive material extending overthe appendixes, the areas of overlap of a line with a column and anappendix defining the source and the drain of a transistor, the grid ofthe transistor consisting of the part of the line situated between theappendix and the column.

In a variation on this process and in order to improve the contactbetween the oxide and the aSiH layer, a highly n-doped amorphous siliconlayer is deposited after the oxide. The first etching is still effectedusing the same mask, but affects both the doped silicon layer and theoxide layer. The second photo-etching is not changed.

An object of the present invention is a variation on this process usingthe doped amorphous silicon additional layer but in which the secondphoto-etching is slightly modified.

In the prior art document, the doped silicon is attacked after thesemiconductor silicon during the second etching. Thus the doped siliconremains only beneath the grid, above the oxide (see FIG. 7b of the mainpatent).

Although the results obtained with the embodiment described in the priorart document have demonstrated the validity of the process and thebenefits of its simplicity, the resulting screens may in some casesfeature a few defects resulting from breaks in the columns. These breaksoccur when there is used for the initial substrate a "Balzers" typeglass covered with a very thin layer of indium-tin oxide. The "natural"fine scratches in these standard substrates (which are not expensive asthey are already used in liquid crystal displays) prevent the formationof very fine strips (approximately 20 μm wide) with a yield of 100%. Itis therefore necessary either to deposit the transparent and conductivelayers onto better quality substrates or to introduce redundancy tocompensate for the interrupted columns.

The second solution is used in the present invention.

Redundancy is obtained by slightly modifying the second level mask sothat after etching there remains over part of the columns a stack formedby the n-doped silicon layer and the subsequent layers. Should thecolumn be broken, a stack then acts as a conductive bridge between thetwo parts of it. There results an electrical redundancy in the design ofthe addressing columns since two conductors are provided in parallel,the second alleviating any defects of the first.

This solution has another advantage: the stack that remains results inoptical masking of the transparent column. If the column is not maskedit is visible in the same way as a display point. Its appearance dependson the average value of the video voltage during a picture. This effectis a considerable nuisance in white on black display mode, since the eyeis highly sensitive to white lines, even if extremely fine. In theopposite mode, black and white, the effect is much less visible since ablack line 20 μm wide on a white background is invisible to the eye.Optical masking of the transparent columns is therefore necessary,especially in the first mode, and is perfectly implemented by thepresent invention.

It will be noted that the improvement in accordance with the inventiondoes not introduce any supplementary operation, since it is merely thedesign of the second level mask that is slightly modified.

Note also that in the case of very wide breaks the resistance of thedoped silicon bridge may become high. The two parts of the column arenevertheless connected electrically by capacitive coupling.

In any event, the characteristics of the invention will emerge moreclearly from the following description of one embodiment given by way ofnon-limiting explanatory example.

This description refers to the appended drawings, in which:

FIG. 1 shows the essential stages of the process in accordance with theinvention,

FIG. 2 shows one detail of the resulting screen,

FIG. 3 shows in cross-section the segment which remains over the columnsafter the second etching,

FIG. 4 is an equivalent electrical circuit diagram illustrating theprinciple of electrical redundancy introduced by the invention.

The various operations constituting the process in accordance with theinvention are shown in FIG. 1, which represents the various intermediatestates of the screen obtained. These operations are as follows:

depositing a layer 120 of highly n-doped amorphous silicon onto a glasssubstrate 100, as sold under the trade name Balzers, for example,previously coated with a layer 102 of transparent conductive material,for example tin and indium oxide,

photo-etching these two layers to produce a mosaic of pads 106 arrangedin lines and columns, these pads forming one of the plates of theeventual capacitors: each pad is joined to an appendix 108; this firstphoto-etching also leaves columns 104 of the first conductive material102 overlaid by the layer 120 of highly n-doped amorphous silicon, thesecolumns lying between the columns of pads (FIG. 1b),

depositing a layer 110 of hydrogenated amorphous silicon overeverything,

depositing an insulative layer 112, of silica for example,

depositing a layer 114 of a second conductive material, aluminium forexample (FIG. 1c),

photo-etching the layers 120, 110, 112 and 114 to expose each pad andleave lines 116 of the second conductive material 114; segments S of thestack remain over the columns, bridging part of the gaps separating twoconsecutive lines; this second photo-etching exposes the transparentconductive material 102 of the columns only at each end of these gaps(FIG. 1d),

depositing a layer of SiO₂ to passivate the assembly.

The position and structure of the segments S remaining over the columnsafter the second photo-etching are better seen in FIGS. 2 and 3.

The role of this segment is explained with reference to FIGS. 3 and 4.FIG. 3 shows a column 102 featuring a break 103. The conductive bridgeformed by the segment S and in particular by the highly doped amorphoussilicon layer 120 re-establishes electrical continuity. If the break 103is very wide, electrical continuity is nevertheless assured (despite thenon-negligible resistance R of the segment of silicon carrying thebreak) by the two capacitors C₁ and C₂ formed by the two parts of thelayer 102 and the conductive layer 114. The equivalent electricalcircuit diagram is shown in FIG. 4.

What is claimed is:
 1. Process for fabricating an active matrix displayscreen in which there is produced a lower wall carrying capacitor platesand thin-film transistors and an upper wall coated with acounter-electrode forming second capacitor plates, characterised inthat, to produce the lower wall, the following operations are carriedout:a layer (120) of highly n-doped amorphous silicon is deposited on aninsulative substrate (100) covered with a layer (102) of a firsttransparent conductive material, these two layers are photo-etched toconstitute a mosaic of pads (106) arranged in lines and columns, thesepads (106) forming one of the plates of the eventual capacitors, eachpad being joined to an appendix (108), this first photo-etching alsoleaving columns (104) of said first conductive material overlaid by thelayer (120) of highly n-doped amorphous silicon, these columns beingsituated between the columns of pads, depositing a layer (110) ofhydrogenated amorphous silicon over everything, depositing an insulativelayer (112), depositing a layer (114) of a second conductive material,photo-etching the stack of layers (120, 110, 112, 114) to expose eachpad but so as to leave lines (116) of the second conductive material(114), this second photo-etching also leaving segments (S) of this stackover the columns over a part of the gaps between two consecutive lines,this second photo-etching exposing the transparent conductive material(102) of the columns only at each end of these gaps.